1. Field of the Invention
The present invention relates to a single crystalline silicon ingot, a single crystalline wafer, and a producing method in accordance with the Czochralski method (hereinafter abbreviated the “Cz Method”), more particularly, to a single crystalline silicon ingot, a wafer and a method of producing a single crystalline silicon ingot which enables a large defect area to be reduced while increasing a micro-defect area in an agglomerated vacancy point area, which is the area between a central axis and an oxidation-induced stacking fault ring, by providing uniform conditions of crystal ingot growth and cooling and by adjusting a pulling rate for growing an ingot, thus the oxidation-induced stacking fault ring exists only at an edge of the ingot radius.
2. Discussion of Related Art
A silicon wafer to fabricate electronic devices such as a semiconductor and the like is provided by thinly slicing a single crystalline silicon ingot. A well-known method of producing a single crystalline ingot for a wafer used for electronic devices such as semiconductor devices is that of Cz Method. The Cz Method makes a crystal grow by dipping a single crystalline seed crystal into molten silicon and then pulling it slowly; this is explained in detail by “Silicon Processing for the VLSI Era”, Volume 1, Lattice Press (1986), Sunset Beach, Calif., by S. Wolf and R. N. Tauber. A general method for producing a single crystalline silicon ingot by the Cz Method will be explained in the following description in connection with the appended drawings.
First of all, a necking step of growing a thin and long crystal out of a seed crystal is carried out followed by a shouldering step which is performed for growing the crystal radially to attain a target diameter. Then, a body growing step to obtain a crystal having a predetermined diameter is carried out. A part grown by the body-growing step becomes a wafer. After the body growing step has been carried out to provide a wafer having a predetermined length, the body growing step is terminated followed by a tailing step of separating the body from the molten silicon by which diameter is reduced gradually.
All these steps are carried out in a space called a “hot zone” in a grower of a crystal growing apparatus where the molten silicon grows to turn into a single crystalline ingot. The grower includes a melt-down silicon instrument, a heater, a heat insulating body, and an ingot-pulling apparatus.
As the defect characteristic inside an ingot depends on the sensitivity of the growing and cooling conditions of the crystal, efforts have been made to control the species and distributions of crystal growing defects by controlling the thermal environment near a crystal growing interface. The crystal growing defects are largely divided into an agglomerated vacancy type defect and an interstitial type defect. If the amount of vacancy type defects or interstitial type defects exist more than equilibrium concentration, agglomeration is commenced and then systematic defects in the crystal may be evolved.
The Voronkov theory, introduced in “The Mechanism of Swirl Defects Formation in Silicon,” Journal of Crystal Growth 59,625 (1982), by V. V. Voronkov, teaches that such defect formation is closely related to a value of V/G wherein V is a pulling rate of an ingot and G is a temperature gradient near the crystal growing interface. Based on the Voronkov theory, an agglomerated vacancy type defect occurs when the value of V/G exceeds a critical value, while an agglomerated interstitial type defect occurs when the value of V/G is lower than the critical value. Therefore, the pulling rate has an influence on the species, sizes and density of the defects existing in the crystal when a crystal is grown according to given growing environment.
FIG. 1 and FIG. 2 show the defect characteristics of an ingot grown by a related art. FIG. 1 shows a defect area which is generated and grown along a length direction of an ingot by varying a pulling rate. The ingot is first grown by pulling up an upper part of the drawing with high speed and then by gradually slowing down the pulling rate to grow a lower part. In other words, the lower part is grown by a low pulling rate and the upper part is grown by accelerating the pulling rate.
Referring to FIG. 1, an interstitial point defect area 11 is generated from a part grown with low speed, while a vacancy point defect area 12 exists at an area generated with a high pulling rate. An oxidation-induced stacking fault area 13, an area free of agglomerated vacancy point defect 14 and an area free of agglomerated interstitial point defect 15 are sequentially arranged from the agglomerated vacancy point defect area 12 between the agglomerated vacancy point defect area 12 and the interstitial point defect area 11. The oxidation-induced stacking fault area is pushed back to the peripheral edge by increasing the pulling rate beyond a predetermined level, thereby distributing the agglomerated vacancy point defects throughout the entire cross-section.
On the other hand, the oxidation-induced stacking fault area is shrunken to the center of the cross-section and eliminated eventually as the pulling rate is reduced, thereby generating the area free of agglomerated vacancy point defects. As the pulling rate is further decreased, an area free of agglomerated interstitial point defect is produced. As the pulling rate is further reduced, the agglomerated interstitial point defect area 11 exists throughout the entire cross-section.
However, the method of producing an ingot according to the related art is unable to provide uniform cooling conditions of axial temperature gradient G in the radial direction of the ingot due to weakness of the hot zone during the growth of crystal. Specifically, heat at the center of the ingot is transferred to the edge of the ingot through conduction and then radiates therefrom, while the heat at the edge of the ingot is directly dissipated by radiation. Therefore, differences in the temperature gradient occur in the radial direction of the ingot.
Generally, the G value increases from the center of the ingot to the edge radially. Thus, when the pulling rate at the center is same as that around the edge, the V/G value at the center increases, causing a significant increase in the agglomerated vacancy point defect. In such central region, coarsely agglomerated vacancy point defects such as Crystal Originated Particle (“COP”) or Flow Pattern Defect (“FPD”) prevails.
FIG. 2 shows a horizontal cross-sectional view of an ingot bisected along the cutting line II in FIG. 1 to represent defect distribution.
An Oxidation-induced Stacking Fault ring (“OiSF”) 13a, is located at an edge of an ingot which is pulled up with the pulling rate indicated as II in FIG. 1. The drawing shows a typical defect distribution of a horizontal cross-section of a single crystal grown by the Cz method by adjusting the ingot pulling rate to a high level.
As shown in FIG. 2, a coarsely agglomerated vacancy point defect area 12 having coarsely agglomerated vacancy point defects exists at the central part of the ingot 10. An oxidation-induced stacking fault ring 13a exists at a location surrounding the coarsely agglomerated vacancy point defect area 12. Further, an area free of an agglomerated vacancy point defect area (vacancy dominating) 15 surrounds the oxidation-induced stacking fault ring 13a. When the oxidation-induced stacking fault ring 13a is located at the circumferential part of the ingot according to the related art, coarsely agglomerated vacancy point defects such as COP and FDP exist at the central part of the ingot. Thus, the ingot cannot be used as a substance for the production of highly-integrated semiconductor devices of micro Critical Dimension (“CD”).
Accordingly, the ingot according to the related art is unsuitable for a wafer upon which micro electronic circuits are to be formed due to the generation of coarsely agglomerated vacancy point defects as the pulling rate is increased for ingot growth. In addition, the productivity of the related art is reduced when the pulling rate is decreased in order to reduce the large defects. Moreover, the related art may generate interstitial defects larger than the large defects of agglomerated vacancy point defect such as Large Dislocation Pit (“LDP”) on a cross-section of a wafer.